Spectral Design and Test Demonstrates MemoryCanvas™ and EntropyDFT™, two New Design Solutions, at DAC 2010.
Spectral Design and Test introduces two new solutions that offer unique capabilities in the areas of Design for Test and for Memory Compilation at the 2010 Design Automation Conference. At the show, the company will present these solutions in a private suite as well as in partner suites.
Bridgewater, NJ – May 17, 2010
Spectral Design and Test Inc. will present first looks at two new solutions for dramatic cost savings and enhanced design productivity. The first solution, EntropyDFT™, is a Design for Test software package that automatically inserts test points into a gate level netlist to dramatically reduce the number of test vectors required for production test of integrated circuits. It uses patented statistical methods involving Shannon’s Entropy theorem to divine out those strategic circuit locations where information flow is poor and introduces targeted test points that make the test generation (ATPG) problem significantly simpler. EntropyDFT™has shown test volume reduction of over 50% on test circuits to date. EntropyDFT™fits seamlessly into any existing DFT eco-system.
The second solution, MemoryCanvas™, is targeted at embedded memory development. MemoryCanvas™is a graphically driven memory assembly tool that is meant to replace thousands of lines of code normally needed to implement a memory compiler or to assemble a complex memory instance subsystem such as a CAM or Cache. It provides for any degree of parameterization and complexity while providing rich graphical feedback to the developer. This approach insures that the compiler is fully visible to the developer so that leaf cell adjacencies, pitch matching, signal direction flow, critical circuit labels and all parameterization features can be readily observed. A graphical floorplan is the input to the tool, which documents the design and compiler. The tool supports a “hidden” batch mode for compiler end users. In addition to providing full layout and netlists for verification, simulation and characterization, MemoryCanvas™also uniquely provides a full instance hierarchical schematic. This view enables fast debugging for the memory developer as well as offering design documentation.
Registration Sign-up:
To sign up to see the MemoryCanvas™demo, register at the following web link:
http://www.springsoft.com/dac2010/seminars#Spectral
For a private demonstration of EntropyDFT™, register directly at the spectral sales email account(Please specify multiple date and time preferences for the demonstration.):
sales@spectral-dt.com
About Spectral Design and Test Inc:
Established in 2008, Spectral Design & Test is a provider of leading edge point solutions and customization services in the area of IC design for complex SOCs.
Spectral offers two product lines: Design IP targeted at building highly customized embedded memory cores & mixed signal designs with emphasis on extreme low power technologies. Test IP is focused on using unique statistical approach to developing DFT (Design For Test) solutions for extremely large SOC implementations.
We are a privately held organization based in Bridgewater New Jersey, the home of innovations in transistor design and manufacturing. Spectral’s Management is comprised of distinguished technologists and executives from leading semiconductor, IP and EDA corporations. We have developed strategic partnerships with top tier service providers to help scale our operations. Spectral has developed proprietary solutions that radically improves design productivity and test outcome.
For More Information:
Contact Info: media@spectral-dt.com
Spectral Design and Test Inc
1200 Rt. 22E
Suite 2000
Bridgewater, NJ
08808
Phone:732-667-3393
Web: www.spectral-dt.com |
